The OFFIS research institute establishes a low power design flow for embedded systems as one main objective. Within previous an ongoing projects a methodology for estimating power of integrated circuits and the base technology of an EDA tools called ORINOCO have been developed. Input for this tool is a behavioral description of hardware in the language VHDL. At system level specifications of multimedia and communication systems typically are described in C/C++. For this reason within this project a C/C++ based low power system design process shall be supported. Manual instrumentation of specifications of complex systems for extracting activity information is not to be expected by a designer, because of the amount of instructions that have to be inserted into the code. Only automatic processing of C/C++ source code leads to the user`s acceptance of a design tool in this field. LP System will extend ORINOCO to enable power estimation and optimization of C/C++ algorithms to be implemented in hardware.