A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs - OFFIS

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A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs

A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs

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All authors

Jan Cordes and Maher Fakih

Booktitle

International Conference on Omni-layer Intelligent systems (COINS)

Publishing date

2019

Type of Publication

inproceedings

Projects

SafePower
Safe and secure mixed-criticality systems with low power requirements

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