A Hypervisor Architecture for Low-Power Real-Time Embedded Systems
Peio Onaindia and Tomaso Poggi and Mikel Azkarate-askatsua and Kim Grüttner and Maher Fakih and Salvador Peiro and Patricia Balbastre
Euromicro Conference on Digital System Design, DSD 2018, Prague, Czech Republic, August 29 – 31, 2018
This paper presents a hypervisor architecture tailored to low-power real-time applications. This architecture extends the capability of a hypervisor by providing power management techniques and power monitoring services. An implementation based on an existing hypervisor XtratuM that runs over the ARM of a Zynq-7000 SoC device is proposed as a proof of concept. Measurement results show that the extended hypervisor can obtain information on the power consumptionand reduce it.
2018
inproceedings
SafePower
Safe and secure mixed-criticality systems with low power requirements (Leider nur in Englisch verfügbar.)
Safe and secure mixed-criticality systems with low power requirements (Leider nur in Englisch verfügbar.)
